Sarang Kazeminia, Maryam Ghafoorzadeh, Faeze Noruzpur

An extendable global clock high-speed binary counter compatible to the FPGA CLBs



22-24 June 2017, 24th International Conference on Mixed Design of Integrated Circuits and Systems, Bydgoszcz, Poland, 10.23919/MIXDES.2017.8005187 [Citation Link]




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